Synopsys’ DesignWare ARC EM SEP (Safety Enhancement Package) Processor core for ISO 26262 automotive safety-compliant applications is a highly efficient 32-bit core that delivers performance up to 300 MHz and power consumption as low as 16 µW/MHz on typical 65LP silicon process, with integrated hardware safety features that enable ASIL D compliance in support of the ISO 26262 standard. In addition, the ASIL D ready certified DesignWare ARC MetaWare Compiler helps software developers accelerate the development of ISO 26262-compliant code. The combination of a safety-enhanced processor and compiler makes the ARC EM SEP core ideally suited for system-on-chips (SoCs) designed for embedded automotive applications such as movement and acceleration sensors, advanced driver assistance systems and electric power steering.
• Optimized for high-efficiency, low-power embedded automotive applications
• Automotive Safety Integrity Level D (ASIL D) ready DesignWare ARC MetaWare Compiler enables development of ISO 26262-compliant software
• Integrated safety features include parity support and error-correcting code (ECC) technology
• Detailed IP safety documentation eases certification of ARC EM SEP-based systems