LTE, the next-generation wireless standard, promises to serve the surging demand for mobile broadband data by increasing peak and average data throughput, as well as significantly reducing latency. When designing an LTE or LTE-Advanced device, achieving standard compliance with the 3GPP specification is a key requirement. However, achieving standard compliance is far from trivial due to the LTE standard’s complexity. For LTE (3GPP release 8), the specification of the physical layer alone takes about 300 pages and defines more than 1000 test cases.
Before entering into the actual design phase, any algorithm designer faces the challenge of turning the paper specification into an executable specification of the testbench. This is a mandatory and labor- intensive task. Worst case, the executable testbench does not adhere exactly to the standard, so the algorithm design is not verified correctly. Best case, the testbench is correct, but then it does not contribute to any differentiation of the product. Synopsys’ LTE library (including LTE-A) is a commercial off-the-shelf testbench solution that fills this gap. Verified against Rohde & Schwarz’s test equipment, it increases both the designers’ confidence for standard compliance, as well as the overall productivity of the algorithm design phase. The LTE library is available for Synopsys’ SPW and System Studio tools, and can also be deployed in C/C++ as well as in MATLAB-based design flows.
A test equipment provider such as Rohde & Schwarz faces the same challenge. The provider must turn the standard specification into a complete executable testbench, handling real-time signals both on the generator as well as on the analyzer side. Signal generators are often referred to as the golden reference for standard compliance for prototypes and even final devices, with Rohde & Schwarz being one of the leading providers. Signal generators are highly parameterized setups that allow for testing many configurations. A major task of the test engineer is to enter the different parameter configurations that match the test scenario as defined in the standard, with 60-70 and sometimes 100 parameters per test. A mismatch in the parameters is one of the most frequent reasons for long debugging sessions during the test phase.
With the need to run standard compliant scenarios of the physical layer both during algorithm design as well as in the final test phase, it is a straightforward idea to bring these two tasks together. To many people’s surprise, these tasks have been in isolation from each other even within most companies. Better interoperability, higher reuse and easier debugging are the key motivations, which are also driving the collaboration between Synopsys and Rohde & Schwarz. As mentioned, the signal generators have been cross-verified against each other. In addition, it is now possible to configure the parameters of the Rohde & Schwarz signal generators directly from the Synopsys simulation so test cases defined in the algorithm design phase can be reused immediately during the test phase. This allows for an easy comparison between simulation and real-time test, and greatly simplified debugging should there be mismatches. Overall, the combined solution results in higher design confidence and higher productivity during all phases of the design and verification process.