The demands in high-temperature applications are growing more stringent, not only in terms of ambient temperatures up to + 230 °C, but also regarding density of power dissipation and reliability. In order to cope with these severe requirements, a great deal of attention must be paid to controlling the junction and solder joint temperatures to minimize reversible and irreversible resistance drifts. 

Thermal Model
In this article, we will explore two types of surface-mounted thin film resistors:
• Wraparound chip resistors and arrays that can be assembled by solder reflow or conductive glues
• Bare chip resistors and networks intended to be wire bonded 

Vishay - Figure 1

In miniaturized surface-mounted components, the heat generated within the resistor is removed to the surrounding environment in the following way:
• Conduction from the resistive layer, or junction, through the body of the chip to the solder pads
• Spreading by conduction within the PCB
• Convection from the PCB to the ambient

Below is a very simple but well recognized model where:
• Tj is the temperature of the resistive layer, or junction
• Ta is the ambient temperature around the PCB
• Tsp is the temperature of the solder pad, underneath the solder joint
• Pd is the power dissipation of the resistor
• Rth ja is the thermal resistance between the resistive layer and the ambient
• Rth jsp is the thermal resistance between the resistive layer and the solder joint
• Rth spa is the thermal resistance between the solder joint and the ambient
• Rth spa takes into account the conduction within the PCB and the convection from the PCB to the ambient

Component manufacturers can only take care of Rth jsp; the control of all others parameters, namely Ta, Pd, and Rth spa, are addressed by the customer’s assembly designers. Designers have to take into consideration the PCB material, the thickness and the layout of the copper tracks, the cooling system, and the interaction between surrounding components.

A poor thermal management might induce:
• Melting of the solder joints
• Lack of reliability of the solder joints
• Loss of PCB performance, even burn out
• Loss of chip resistor performance, mainly due to high reversible or irreversible drifts 

Thermal Data
In order to allow designers to use the above thermal model, we shall provide them with:
• Rth jsp for standard parts and enlarged terminations parts
• Experimental data relevant to chip resistors of standard sizes mounted on various PCBs

Meanings of the abbreviations for the data below are:
• PCB sCu: 1.6 mm thick, double sided, 35 ?m thick copper (minimum), and at least 50 % copper coverage on both sides
• PCB Mcu: 1.6 mm thick, double sided, 70 ?m thick copper (minimum), and at least 80 % copper coverage on both sides
• MCM: Alumina substrates with thick film metallization and at least 50 % conductor coverage. It is equivalent to MCu for the thermal dissipation
• W/A: Enlarged wraparounds equipped with bottom metallization covering their backside, with the exception of a 0.5 mm width insulation path

The following tables show the thermal resistances relevant to various combinations of components and PCBs. 

Vishay Web Tables

Derating Curve

Meaningful Derating Curve

Vishay - Figure 2 This derating curve is a representation of a basic thermal model:
• Tc = Ta + Rth x Pd
• Tc = Temperature to be controlled
• Ta = Ambient temperature
• Pd = Maximum allowed power dissipation
• Rth = Thermal resistance between point “c” at temperature Tc, and the ambient

It can be written: Pd = (Tc - Ta)/Rth.

This thermal model gives the maximum allowed Pd for a given Ta, and a specified thermal path characterized by Rth. Such a derating curve is used to control Tj, and in this case one considers Tj as Tc, and Rth ja as Rth. It can also be used to control Tsp, which is also of premium importance. In this case Tsp = Tc and Rth = Rth spa.

Vishay - Figure 3

Per the table:
• Rth ja = 52 °C/W (P 2010 on a MCu PCB)
• Rth ja = 95 °C/W (P 2010 on a sCu PCB)

There are different ways to use this derating curve. Providing Tj max = + 230 °C, the maximum power dissipation of the resistor at Ta = + 200 °C will be:
• 0.57 W for Rthp= 52 °C/W (best assembly)
• 0.32 W for Rthp= 95 °C/W (standard assembly)

From the same derating curve one can see that a 0.32 W power dissipation on the best assembly (Rth ja = 52 °C/W) will limit Tj at + 215 °C, and therefore decrease the resistance drift thoroughly.

Vishay - Figure 4

• Rth ja = 67 °C/W (P 0603 on a MCu PCB)
• Rth ja = 200 °C/W (P 0603 on a sCu PCB)

Providing Tj max = + 230 °C, the maximum power dissipation of the resistor at Ta = + 200 °C will be:
• 0.447 W for Rthp = 67 °C/W (best assembly)
• 0.15 W for Rthp = 200 °C/W (standard assembly) 

To help assembly designers keep Tj under control, we have worked out a thermal model and have shown the thermal resistance figures necessary to use this model. From there we defined and displayed some derating curves, which illustrate how good thermal management leads to load-life drift minimization. The next step will be for manufacturers to improve their design and process in order to push away the + 230 °C Tj limitation.