Interface Concept introduced the IC-FEP-VPX3b, a 3U OpenVPX front-end processing board with a flexible Virtex-6 FPGA and a FMC site (VITA 57.1). The board is suitable for applications such as radar, sonar, electronic warfare, imaging and communications by offering high performance logic and desirable digital signal processing slice resources, while maintaining low power. The FMC site, being VITA 57.1 compliant, interconnects ADC, DAC, general IOs, video, Serial FPDP cards, or additional FPGA FMC modules. The board, based on a Xilinx Virtex-6 FPGA, offers two banks of 40-bit 1.25 GB DDR3 memory, and a Spartan-6 control node. Complying with the VPX standard, the IC-FEP-VPX3b, features four 4-lane fabric ports on the P1 and general purpose IOs (on P2).

Interface Concept
+33 (0)298 577 176, www.interfaceconcept.com