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32-bit RISC CPU targets performance-intensive market

Wed, 07/21/2010 - 10:22am

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Faraday Technology Corporation today announced its highest-performance ARM v5 instruction set architecture-compliant processor-FA726TE. This generic 32-bit RISC CPU is specially designed to target the performance-intensive market, such as set-top box, IP TV, Gbps network, SAN/NAS, netbook, digital entertainment devices, MFP, navigation, and multi-format wireless gateway applications. The first hard core which reaches 1 GHz clock rate at the worst case is in UMC 55nm process, and the engineering sample is available now for customers' evaluation. In addition to its high performance/cost, Faraday's complete IP pool and SoC development environment also benefit its ASIC customers by enhancing their competitiveness in performance, power-efficiency, and time-to-market.

With the rapid growth and change on the features and capabilities of CPU applications, the unceasing strong demands of multi-tasking systems and complex processing require more powerful processors that consume less energy than previous generations. Faraday therefore develops the FA726TE processor based on the pipelined dual-issue super-scalar micro-architecture achieving the Dhrystone performance of 2.4 DMIPS/MHz, consuming lower than 250mW with a performance-oriented configuration.

“We are very glad with the delivery of this superlative processor core,” said Steve Wang, Chief Strategy Officer at Faraday. “As one of the few architectural licensees of ARM, Faraday maximizes the v5 ISA value and expands the new territories of CPU by enhancing the performance and power efficiency. The newly-launched FA726TE, featuring the ultimate performance/cost with supreme energy-efficiency among the market, will help our customers shorten their time-to-market, together with Faraday's complete development environment,” he added.

To facilitate customers' easy integration of logics and application development, Faraday will provide FA726TE processor with a complete development environment, including multi-functional evaluation A369 platform [Note] , with robust ecosystem of tool chains and debuggers. In addition, Faraday will also equip customers with AX IPs for the customized SoC solution, including various controllers and bridges.

“Faraday is experienced in micro-architecture design, synthesis expertise, and optimized layout, which are all key factors contributing to the provision of the FA726TE processor,” said Allen Chen, Associate Vice President at Faraday. “Designed specifically for the large amount of data processing, the FA726TE processor is fully synthesizable, which is able to operate at the requested frequency in different processes to satisfy varies applications,” he added.

About FA726TE

The FA726TE processor with thirteen pipeline stages has the separate instruction/data caches and scratchpads with DMA function, write buffer, memory management unit, power saving unit, standard JTAG debug interface, and optional VFP unit. It is capable of highly accurate branch prediction and supports up to 6 outstanding non-blocking data caches and two-level interrupt priority. The FA726TE processor core communicates with external memory and devices by configurable 64/128-bit AXI bus or 32/64-bit AHB interfaces.

[Note] About A369 platform and AXI IP

-SoCreative!IIITM
A369 platform for SoC development consists of generic fundamental IPs in system, connectivity, display, multimedia accelerator, memory subsystem, and system extension categories, which accelerate customers' applications development. With the SoC prototype chip and extended bus interface, SoCreative!IIITM allows designers to integrate their user logic with proven system architecture and perform fast function verification and software development.

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