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PLL/Synthesizer includes typical Step Size of 2500 KHz

Mon, 10/12/2009 - 7:59am

ec911pc291-webCrystek's CPLL58-4240-4240 PLL/Synthesizer operates at 4240 MHz with a typical Step Size of 2500 KHz. The PLL/Synthesizer is programmed using a standard three line interface (Data, Clock and Load Enable). Typical phase noise for the CPLL58-4240-4240 is -95 dBc/Hz at 10 KHz offset with minimum output power of 3 dBm. VCO voltage is 5 Vdc; PLL voltage is 3 Vdc. Second harmonic suppression is -15 dBc typical.

Crystek
800-237-3061, www.crystek.com 

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