Serial Analyzers for PCIe 2.0 Provide Power Management and Cross Bus Analysis
Tektronix announced new TLA7S16 and TLA7S08 Serial Analyzers for test and validation of PCI Express (PCIe) 1.0 and 2.0 designs. The devices provide detailed PCIe 2.0 protocol information along with cross-bus analysis. The new analyzers plug into the company’s TLA7000 Series logic analyzers, adding the ability to debug and correlate general purpose signals and other system interconnects including memory and computer processors. The Tektronix TLA7S08 and TLA7S16 Serial Analyzers can acquire x1, x4 links or x8 links respectively. Two TLA7S16 Serial Analyzers are used for bi-directional x16 links. PCIe 2.0 links can change width (number of lanes) dynamically. For instance, an eight-lane link (x8) could change to four lanes (x4) -- which requires less power -- and return back to x8 when this is needed by the system. The PCIe 2.0 specification also allows for the link to dynamically alternate the speed between 2.5 Gb/s to 5 Gb/s, supporting both PCIe 1.0 and 2.0 standards. Additionally, a link can go into idle power states during the short periods of time when it is not being used. The new serial analyzers can uniquely validate and debug operation of these link processes. For cross-bus analysis, the Tektronix TLA7000 logic analyzer is said to be the only tool that is able to time correlate interactions between PCIe, processors, and memory using a single test platform. In addition to the serial analyzers, new P6716/P6708 mid-bus probes and pre-release slot interposer probes are available to test and validate all layers of the PCIe 2.0 protocol. The Tektronix TLA7000 Series Logic Analyzer, TLA7S16 and TLA7S08 Serial Analyzers, P6716/P6708 mid-bus probes and the pre-release slot interposer probes are used to test and validate all layers of the PCIe protocol: physical, data link, and transaction layers.