Texas Instruments introduced a 16-bit, dual channel, 1 GSPS (giga sample per second) digital-to-analog converter (DAC) family. The single and dual-channel DAC family features a low-voltage differential signaling (LVDS) data input port at 1 Gbps, providing up to 400 MHz signal bandwidth. In addition, the DAC family offers flexible configuration options as well as industry-leading tools and support for base stations, wideband IF transmitters, radar, and test and measurement equipment. Offered in a 9 mm × 9 mm QFN package, the DAC568x family provides several configuration options to support different transmit architectures, such as direct up-conversion, real or complex IF, and different wireless air interfaces such as WCDMA, TD-SCDMA, WiMAX and LTE. For an output frequency of 160 MHz, the devices achieve 73 dB ACPR for a single-carrier WCDMA application or 67 dBc for a four-carrier application. Along with the single-channel DAC5681 and DAC5681Z, the dual DAC5682Z offers many digitally configurable features such as selectable low-, high-, or bypass filter modes; interpolation: 2×, 4× or bypass; optional ±Fs/4 or ±Fs/8 coarse mixer; optional 2×-32× clock multiplying PLL; and an eight sample input data FIFO. The company's evaluation modules (EVMs) allow designers to make rapid systems-level evaluation with the DAC5682ZEVM for baseband outputs and the TSW3082 for RF output. In addition, TI's TSW3100 digital pattern generator provides inputs to either evaluation platform via a 1 GSPS LVDS bus with up to 256 mega vector pattern depths. Together, the evaluation modules and TSW3100 allow designers to realize system performance characterisitcs provided by the family’s wide bandwidth, including desirable power amplifier linearization for digital pre-distortion (DPD) solutions with TI’s GC5322 single-chip transmit processor solution. The DAC5682Z is available in a 64-pin quad flat no-lead (QFN) package and is priced at $31.95 each in 1,000-piece quantities.