Low-Power FPGAs Offer Cost-Effectiveness
Presented as having the lowest (up to half) power consumption and price of any SERDES-capable FPGA device, the LatticeECP3 family is also presumed to be the only 65-nm mid-range products of their type. Features include multi-protocol 3.2G SERDES with XAUI jitter compliance, DDR3 memory interfaces, DSP capability, on-chip memory and up to 149K LUTS. The LatticeECP3 FPGA family is supported by the ispLEVER design tool suite, version 7.2 Service Pack 1. From $35 each in quantitities of 25,000.
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For more information about the new LatticeECP3 FPGA family, please visit http://www.latticesemi.com/products/fpga/ecp3