Clock Distribution Devices Offer HCSL Outputs
ON Semiconductor introduced two clock distribution devices for synchronization of memory modules found in today’s most advanced computing, data storage, networking consumer applications. The NB4N121K and NB4N111K feature differential host clock signaling level (HCSL) outputs and ultra low propagation delay variation for fully buffered dual inline memory module (FBDIMM) applications. The new NB4N121K and NB4N111K are 3.3V clock distribution devices with differential HCSL outputs targeted for typical FBDIMM frequencies of 100 MHz, 133 MHz, 166 MHz, 200 MHz, 266 MHz, 333 MHz and 400 MHz. Employing advanced 0.25 micron µm CMOS technology, they produce additive phase jitter of 0.3 ps and output-to-output skew <100 ps. (Delta tpd 100 ps Maximum Propagation Delay Variation per each Differential Pair.) The devices’ design, layout and processing minimize within device skew and skew from device to device. System designers can distribute low skew, low jitter clocks to their memory controllers and FBDIMM modules. Clock inputs for both devices incorporate internal 50ohm on die termination to reduce component count and simplify board layout. The NB4N121K is a 1:21 or 1:42 HCSL clock distribution device. At 1:21, the device provides a wide fanout, and it can be configured in 2X mode to provide a 1:42 HCSL fanout. The NB4N111K is a 1:10 HCSL clock distribution device.
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