I've described the optimal way to create your land and solder paste layer for QFNs a couple of times  before. But that was for a standard square QFN or rectangular DFN. What happens if you look at the bottom of your QFN and it's all weird like this one?
Does it require a different philosophy for the big pad areas? Should it just be a solid opening because their is more than one thermal pad and they don't cover the whole area?
Well, this pic is an Intersil ISL8200 power module. It's pretty cool and Intersil was kind enough to actually put the paste layer recommendations right in the data sheet. Unfortunately, not all chip manufactures do that.
The bad news is that it's a pretty complex pattern. The good news is that the data sheet gives a diagram with great detail on the required dimensions for the lands and the stencil. And, yes, you treat this just like any other QFN thermal pad. They recommend 50 - 80% paste coverage for the thermal pads just like everyone else. That means that you'll segment the paste cut-outs in the paste layer for each of the four thermal areas just like you would for the whole pad area on a standard QFN. The data sheet for this part has the specifics.
For similar parts from other manufacturers, you should go to their datasheets and app notes first, but if you don't find a recommendation, we would suggest you do the segmenting and shoot for somewhere between 50 and 80% coverage. Putting down too much paste is a bad idea for any QFN or DFN, but it's probably even more critical with a part like this where the solder areas only cover half the part. If there's too much solder on the underside, it will likely tilt and most likely not solder reliably.
Don't eat paste.