Via in big pads
The answer to the question: "is it ever okay to put open vias in BGA pads?" is simply No. It's no, no, no, no, not ever!!! That makes it easy. No technique to worry about. No tolerances. Nothing. Just don't put an exposed via in a BGA pad. The only option is between the pads, with a complete soldermask dam between the pad and via, or have the vias filled and plated over at the board house. Nothing but metal is allowed on the BGA pad.
Now, other components give you more flexibility and thus require some choices and guidelines. Andy B. asked about large components, such as voltage regulators where the manufacturer has recommended vias to connect the thermal pad to the ground plane, or to additional thermal area on the back side of the PCB.
The easy answer is to just treat it like a QFN and read our various suggestions surrounding that form factor. Here's some . Having the extra room does allow for additional flexibility, but if the vias are open, they still run the risk of sucking solder to the other side of your PCB. You can sometimes get away with really tiny vias, as in here . But it's not best-practice.
It's really a matter of trade-offs. I have seem opinions stating that you should never fill or cap the via because doing so might impede the thermal transfer. Well, power chip manufacturers, you shouldn't rely on unbuildable design to meet product specs. You can fill the vias with thermally conductive material. You can cap the via with solder mask, as in the link I just gave you. Just make the via cap as small as possible - 100 to 125 microns larger than the via.
Finally, segment your paste stencil layer. If you put solder paste on top of an open via or even on top of a masked via, you can be asking for trouble. In this image, the six vias (which will be capped) are put between the openings of the stencil.
Tesla says what?