Roundtable: Predictions for 2013
What trends and technologies have impacted the industry in 2012 and what does that mean for 2013?
Eric Peeters, Dow Corning, www.dowcorning.com 
The power electronics industry will remember 2012 as the year silicon carbide (SiC) technology turned the corner. With the emergence of high crystal quality 150-mm SiC wafers this year, the entire power electronics value chain began to undergo a fundamental step change. But the impact of that will become truly apparent next year as scale-up to high-volume wafer production begins. Consider for a moment just the United States where electricity comprises 40 percent of the total energy consumed. Already, silicon-based power electronics are pushing their physical limits and, by some estimates, waste over two thirds of the electricity they transmit or control on the grid alone. Silicon carbide is considerably more efficient and reliable than conventional silicon, making it well suited for high-temperature, high-frequency and high-power applications in markets such as transportation, industrial and energy. Until recently, however, SiC wafer diameters and crystal defects, such as micropipes, have limited yields and the use of SiC in high-volume applications. But this year, Dow Corning demonstrated extremely low-defect SiC wafers that share a comparable 150-mm diameter with today’s conventional silicon wafers, heralding the potential for large-area, high-volume manufacturing of SiC substrates. As we bring volume production of these high-purity SiC wafers online through 2013, it will open vast opportunities for an entirely new generation of power electronics devices. The overall impact of SiC-based power electronics could even eventually manifest as a U.S. domestic energy savings of approximately $400 billion annually, according to the USA DOE. If we extrapolate that worldwide, the potential cost savings are staggering.
|Vince Stueve, Micrel, Inc, www.micrel.com 
Faster clocks with lower jitter will become more important as processor clock speeds, SERDES on ASIC’s and FPGA’s along with the movement to 10, 40 and even 100Gigabit Ethernet continue. The faster clock rates of SAS/SATA and larg volume of data being moved on PCIe and other serial interfaces imposes more constraints on the jitter budget of the clock tree. Clocks with <1 ps of jitter or even lower will become commonplace. Tightly controlled PLLs immune to power supply noise are necessary to synthesize these low jitter reference clocks. Phase noise plots will become increasingly important tools for designers as they make decisions about which clock to use. Also, the clean clock source must then be distributed to other devices. In the routing process the clocks pick up noise which can be seen as spikes on the resulting system level Phase Noise Plot. Noisy power supplies, routing and the cross coupling of other frequency sources add to the overall jitter in a final system implementation. What starts out as a 100 fs clock can end up being in greater than 400 fs quickly if good design practices are not followed at the PCB level.
Paul Ekas, Microsemi Corporation, www.microsemi.com 
One of the biggest ongoing trends is functional integration advances for field programmable gate arrays (FPGAs). Most major suppliers now offer devices that combine an FPGA fabric with system-on-chip (SoC) functionality including built-in math blocks, high-speed serial interfaces and microprocessor cores. During 2013, FPGAs will be further enhanced for industrial, military, aviation, communications and other applications that require even greater integration plus advanced security, low-power operation and improved reliability. We expect major advances in each of these areas. The latest SoC FPGAs include a full-featured microcontroller subsystem with embedded processor plus advanced security processing accelerators, DSP blocks, SRAM, eNVM and multi-gigabit serial communications interfaces. The security focus will be on protecting application data processed by the FPGA. In the area of power efficiency, SoC FPGAs will reduce standby power consumption by a factor of 100 through implementation of very-low-power modes between system activity bursts. Reliability will be improved by leveraging the natural immunity of flash-based SoC FPGAs to single event upsets (SEUs), which today represent the single most common cause of system failure. Thanks to ongoing developments in each of these areas, the coming generation of SoC FPGAs will fuel important advances in mission- and life-critical systems by delivering inherently superior system reliability and security plus low-power operation in a highly integrated solution.
|David Norton, TDK-Lambda Americas, www.us.tdk-lambda.com/lp 
One trend impacting manufacturers is the increasing amount of legislation driven by governments and safety certification bodies. The Congo Conflict Minerals Act of 2009 requires an enormous amount of research to determine that the source of certain minerals, including gold, is not mined in conditions of armed conflict and human rights abuses. New EU legislation has affected the CE mark, which becomes effective on January 2, 2013. The REACH regulations address the production and use of many chemical substances that in turn burdens OEM Engineering and Sustaining Engineering organization’s budgets. Updates to both IEC 60950-1 (Safety of Information Technology Equipment) and IEC 60601-1 (Medical Electrical Equipment) have been costing companies both time and money. A product that is sold globally may have significant fees paid to a whole host of countries, even China, under the CCC certification mark. These fees range from a few hundred dollars to several thousand. One way a company can reduce these fees is to “prematurely” obsolete (drop) product lines that do not meet the new standards. Of course, in many cases new products have to be developed to replace the non-conforming versions.
Eric Pittana, Exar Corporation, www.exar.com 
Lower geometries, higher operating frequencies, lower quiescent current, new architectures: power management semiconductors have long benefited from each technology leap providing simpler and more efficient solutions. This continuous improvement in power management devices performance answers one fundamental question: how efficiently is each kilowatt hour used? Yet, a more subtle and recent question, though just as fundamental, is being asked by the industry: where, when and how is each kilowatt hour being delivered? The answer? Energy monitoring. Power hungry industries, like server farms and data centers, are eager to better understand and control their power usage. Energy is the lifeline of any electronic equipment, and monitoring its consistent usage is a powerful indicator of a system’s health and performance whereas consumption anomalies may point towards a less than optimum performance and potential equipment failure. Ultimately, this trend optimizes performance while reducing energy operating costs. Power usage data already exists at the main power distribution grid pipeline but is lacking once that energy is distributed and converted. Equipment and semiconductor manufacturers are therefore mandated to provide the adequate tools for real time system energy monitoring as granular as the single point-of-load level.
|Adrian Rawlinson, Marl International,
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LED equivalent light sources are now available for almost all domestic and commercial applications, and are continuing to make inroads into all kinds of specialist professional markets including marine, defence, aviation and all modes of transport. In principle, I don’t think there is any form of lighting that can’t be addressed by LED, but several niches still elude us. Car headlights, the highest efficiency fluorescents, stadium floodlights and gas discharge lamps are major lighting applications where LED lighting cannot provide a suitable solution at the moment. The problem isn’t providing sufficient light output but getting rid of the associated heat. It is possible to combine LED die to produce almost any brightness you desire, but LED die have to be kept under 100°C, and often the heat sinks required are just too bulky. The real challenge isn’t making brighter LEDs but making more efficient LEDs that generate less heat. The announcement by Citizen last October of an LED providing up to 17,675 lumens was significant therefore not so much because of the sheer light output, but because of its exceptional luminous efficiency. They are up to 40 percent more efficient than the manufacturer’s existing products and achieve up to 155 lumens/Watt. The high luminous flux and the exceptional efficiency of the whole range has been achieved by using Citizen’s Chip on Aluminium technology to improve heat dissipation, and through careful selection and optimization of the construction materials. Marl is offering the new Citizen LEDs in a range of five types with light outputs from 100 lumens to 17,675 lumens, to replace a variety of light sources from a 10-W incandescent bulb to a floodlight.
Ilyas Mohammed, Invensas, www.invensas.com 
Not too long ago, a system could easily be taken apart into its constituent modules that were built using components and packages, while all the parts interfaced according to open standards. This allowed thousands of players to participate in the grand semiconductor industry. It also allowed tremendous variety and reuse for customers, where systems didn’t die, but were upgraded, cannibalized, and even kept as memorabilia. The only assembled part that could not be taken apart was the package. 2012 has changed the balance from the open system to an OEM-driven sealed system. Cellphones made the sealed system popular, but with tablets and even the MacBook Pro having soldered-down memory with no chance of upgrade, the era of user customization is over. This trend towards system as a sealed package has tremendous benefits, ranging from system performance to design. Looking forward to 2013 and beyond, the relentless system optimization effort will demand the package be more transparent, requiring innovative solutions. The Package-on-Package (PoP) is one such example. Another example is embedded chips in substrates. 2013 will see whole DIMMs reduced to single packages. The next processor package would be using a silicon interposer with a full compute engine (processors, memory) on it. The traditional motherboard will essentially reduce to couple of packages, making room for new components such as MEMs, optics, sensors, etc. This implies whole layers of interconnects (module boards, connectors, cables) will disappear, giving rise to innovative interconnects in these new systems as packages. Later on, printed electronics will further blur the lines between systems and packages. This systemization of packages leading to miniaturization and eventual “disappearance” are necessary steps towards increasing ubiquity of electronics in our lives.
Rodd Novak, Peregrine Semiconductor Corporation, www.psemi.com 
The year 2012 marked the wide-scale introduction of tunable components into the RF Front End (RFFE). This milestone represented the high-volume rollout of tunable components that have been in development for a considerable number of years. It was driven by advancements in the capabilities of tunable components, coupled with increased market demand. From the market side, the transition to 4G LTE smartphones during the year demanded higher-linearity RF components, a smaller physical antenna area, and an extension of bandwidth down to 700 MHz. These factors strained the traditional handset’s ability to efficiently operate at the band edges. In order to solve this problem, tunable technologies were originally introduced to provide static tuning to the handset antenna, and meet the core requirements of the stringent handset environment. Specifically, the tuner’s linearity, insertion loss, tuning ratio, quality factor, voltage handling, and accuracy met the range needed for the antenna-tuning requirements of 2012. It appears that mainstream 4G LTE applications are incorporating a number of different technologies, including UltraCMOS®, RFSOI, GaAs, MEMS, and Barium Strontium Titanate (BST). This trend seems to be accelerating, and the opportunities for tunable components in the latest top-tier smartphones are increasing. While 2012 marked the introduction of simple tunable capacitors, the need for more complex tuning networks is quickly becoming apparent. To ensure the implementation of these advanced tuning networks, the antenna solution must be thought of not as a single element, but rather as a part of the RF signal chain. It is expected that a system-design approach will be demanded, in order to enable tunable networks in the RFFE in 2013, and beyond.