Design Talk: Technology Applied

 

Bridging the Last Mile: A comparison of access technologies to meet consumer broadband demands
By Venkat Sundaresan, Ikanos Communications, www.ikanos.com [1]

Consumers are becoming more reliant on broadband access for entertainment, education and work at home. But, as these new applications entrench themselves in everyday life, the need for large amounts of bandwidth to the digital home grows exponentially.  
Service providers can choose from a variety of alternative access network technologies to deliver the broadband applications that consumers desire today, and support development of new bandwidth intensive services into the future. These technologies range from copper-based solutions (VDSL2 and ADSL2+) and fiber to cable and fixed wireless (WiMax).

Bandwidth Demands
HDTV and high-speed Internet require large amounts of reliable always-on downstream bandwidth to ensure customer satisfaction. On the other hand, high-speed Internet requires the largest amount of upstream bandwidth as consumers are increasingly uploading terabytes of data — from photos destined for grandparents to videos for YouTube. Downstream data rates can range from just over 40 Mbps to over 90 Mbps, and upstream rates could go from 15 Mbps to over 30 Mbps in an HDTV-enabled Internet-heavy household.

Fiber Versus Copper
The means by which service providers choose to deliver broadband services to their customers is determined by a number of factors including time to market, cost to deploy, system performance and the geographic location of customers. Fiber, for instance, is capable of delivering extremely high bandwidth and offers more flexibility and scalability for future applications. However, fiber builds are costly and time consuming. Service providers need to bury fiber and deploy completely new infrastructure to every household. Because it is the most advanced infrastructure available today, fiber is capable of delivering extremely high bandwidth. R&D efforts underway now are likely to result in new ways to use the optical signals even more effectively, enabling greater bandwidth with little additional investment.

Most of the world’s service providers, however, have opted to use existing copper in their networks. By using VDSL2 or ADSL2+, service providers can maximize their existing assets by increasing broadband capabilities of their copper network infrastructure to deliver voice, data and video services. Because they are not undertaking a complete overhaul of their access network, these service providers can quickly and cost-effectively begin offering revenue-enhancing “triple play” and video services.  
VDSL2 is the preferred choice for many telcos because it can offer higher symmetrical data rates than the various flavors of ADSL at shorter distances and the same performance as ADSLx at longer distances. For instance, VDSL2 can deliver up to 100 Mbps in the downstream and upstream directions, while ADSL2+ maxes out at 25 Mbps downstream and 2 Mbps to 3 Mbps upstream. However, VDSL2 and ADSLx are both similar in that the performance of each is dependent on the distance between the fiber termination point and the customer, as well as the electrical crosstalk that is present between lines. 

A Hybrid Approach
NTT, KT and many other service providers in Europe, North America, and Asia are using VDSL2 in a hybrid approach to deliver broadband services to multiple dwelling units (MDUs). In these types of buildings, riser space is limited, leaving little room to deploy new fiber. Additionally, making fiber available to consumers on each floor of the building will complicate the installation process. With VDSL2, service providers can capitalize on the existing copper infrastructure in the buildings and offer the same types of services they are delivering via fiber-to-the-home.

Cable companies use a hybrid fiber coax (HFC) architecture to deliver advanced broadband and triple play services to their customers. Much like the FTTN scenario with DSL, the typical HFC network uses fiber from the cable headend to the serving node located in the neighborhood; then coaxial cable is run from the node to individual homes. Most cable companies have had established HFC networks for more than a decade for their television offerings, making it easy to upgrade the architecture to support new broadband applications such as voice telephony, high-speed Internet access and video on demand. In the U.S., cable companies are able to offer broadband access of 5 Mbps or greater to more than 90 percent of all households, according to the National Cable & Television Association.

Street Talk: Reducing the size of Medical Devices By Ed Slavetsky, Endicott Interconnect Technologies, www.endicottinterconnect.com [2]  When our customer was trying to create the smallest possible electronic subsystem consisting of several large, high I/O flip chip ASICs to fit into an ultra-portable medical device, the challenge was brought to our engineering and manufacturing specialists. In addition to the unique spatial requirements with such a large number of interconnections, the need to package them within extremely tight requirements for electrical performance was specifically challenging. Factors involved included such items as low signal-to-noise ratios (SNR), low signal skew, and protecting high signal integrity from the crosstalk effects of high voltage pulses that would be present in the system. We chose to use CoreEZ organic semiconductor substrate for its electrical performance capabilities and its flexible design/materials/manufacturing/assembly ground rules that enable strict skew specification between the ASIC die to be maintained. By splitting one of the four available power planes, the high voltage pulsed power needs could be accommodated yet isolated from the noise-sensitive digital power distribution. Utilizing the high performance wiring ground rules of CoreEZ, the large I/O flip chip ASIC die could be wired out in such a way as to minimize the size of each assembled module. Taking advantage of the substrate’s low loss material properties, the individually packaged dies were stacked vertically to further minimize the entire subsystem size, and our thermal and mechanical packaging engineers supported the customer’s system cooling scheme by providing modeling of the laminate subassembly.

Street Talk: Chasing Efficiency in Embedded Designs John Weil, Freescale Semiconductor, www.freescale.com [3]   Energy efficient embedded designs are the next major embedded challenge. Embedded designers have the ability to impact the future of energy use by putting energy consumption first in our design methodologies. I try to establish a detailed energy budget or energy footprint for each embedded system design. Here are a few of my favorite energy efficiency ideas: 1) Examine the energy source. Solar, battery, communications links, or line supplies all have different supply characteristics that can affect your design. Picking the right regulator for your energy source is critical before you go any further. 2) Minimize your resistive losses by eliminating unneeded resistors and using appropriately sized resistors when needed. 3) Use multicolor diodes, where possible, to minimize the number of diodes in your system to convey a status state. 4) Memory usage should be closely scrutinized. Large amounts of embedded SRAM are easily accessible in today’s market, but that attraction comes at a cost as large SRAMs will use more power than smaller versions in the same process technology. SDRAM (SDR/DDR/DDR2) memories come in larger bit densities every day, but refresh cycles on larger arrays can waste significant amounts of energy. 5) Develop a software energy management layer for even your simple designs. Code your simple programs to run functions on time slots to allow yourself to maximize the deep sleep modes of most modern MCUs.

Street Talk: Making a Design Work Carl Blake, International Rectifier, www.irf.com [4]  Sometimes asking why parts are made in a particular way reveals an opportunity to improve the efficiency. Most IGBTs are designed to withstand a short circuit for 10 µs. This requirement originated when IGBTs were used to control motors that can operate with a stuck rotor, which appears as a short circuit to the IGBT. The 10 µs period provided sufficient time to remove the gate drive from the IGBT if the controller containing the IGBT was remote from the motor. A UPS inverter system does not have a normal operation mode that will create a short circuit like a stuck rotor, and it is usually followed by an inductor that will limit the current rise during a short circuit on the output. The response time for detecting a short and removing the gate drive is usually <3 µs. Using these three items allows the requirement for short circuit withstand time to be removed, which allows the IGBT design to be optimized to improve the efficiency of the inverter circuit.

On RF Transceiver Design
by Erik Org and Russell Cyr, BitWave Semiconductor
The challenge to the mobile device OEMs to integrate more and more radio functionality into smaller devices is becoming more difficult. In particular, RF integration is a growing design bottleneck. Without access to the automated digital toolsets available for digital design, synthesis and verification, good RFIC engineering has remained part “art” and highly dependent on designer intuition for high performance, low power area efficient designs.
Since the beginning, RFIC engineers have relied upon traditional multi-stage or single-stage conversion architectures with fixed functionality. A fixed function transceiver is architected to cover a specific wireless protocol over a specific number of frequency bands. Most modern RFIC designs are single chip implementations of fixed function transceivers.
There have been some recent trends in trying to engineer and produce multiple fixed transceivers in a single chip design. However, given the great variety of wireless devices and combinations of protocols and frequency bands required, these more complex RFICs find a limited lifespan in wireless devices after a considerable investment.
One opportunity to simplify device development would be through incorporation of an RF platform architecture whereby the same fundamental RF building blocks could be reconfigured into an RF front end capable of supporting multiple wireless protocols and frequency bands without requiring additional silicon area for each additional mode of operation. This architecture could then be configured for various wireless devices supporting the unique combinations of wireless protocols and frequency bands while minimizing RFIC investment.

Building an RF Front End
The basic building blocks for a fully configurable RF front end architecture include the antennas, filters and duplexers, power amplifiers, switches and RF transceivers. Antennas and switches have already demonstrated a degree of broadband capability. Front-end filters, duplexers and power amplifiers have not been the area of concentration as the limiting factor which, until now, has been the RF transceiver.
BitWave Semiconductor has recently announced the Softransceiver RFIC in which a single transmit and receive channel are reconfigured from 700 MHz to 3.8 GHz while supporting up to 20 MHz of instantaneous bandwidth. The Softransceiver also reconfigures the operating point of all elements in each chain so that the maximum performance is achieved with minimum power consumption. This is achieved by integrating configurable analog RF elements in the design with programmable digital controls.
The benefit of integrating “traditional” configurable analog RF elements is that the resulting design is as power efficient as purpose-built RF transceivers. This contrasts sharply with over-sampling and sub-sampling architectures that must use fast sampling analog-to-digital conversion (ADC) technology and digital processing to channel the signal of interest. These architectures consume more power to convert the RF signal to usable digital I/Q baseband symbols than a traditional low IF (LIF) or zero IF (ZIF) RF transceiver.

Overcoming Limitations
What has limited the reconfigurable RF approach in the past is how to make the transceiver elements, for example, the low noise amplifier (LNA), simultaneously high performance and smaller (lower cost). The newer, patented approach removes the traditional fixed impedances, inductances and reactances associated with a design and replaces them with smaller, digitally controllable versions. Adding digital circuitry to control the functional blocks more than compensates for reductions in the analog block area resulting in each transceiver element, i.e. the LNA, being smaller in area than a fixed LNA in a traditional design. The resulting transceiver is as power efficient as a fixed transceiver, yet also smaller than multi-band transceiver solutions. All of the reconfigurable design was achieved in a commodity digital CMOS fab process using standard commercial packaging techniques.