High-performance 32-bit RISC Secure core is based on CORTUS APS3s
StarChip has developed the ARX CPU, a high-performance 32-bit RISC Secure Core based on Cortus’ APS3s CPU.
The APS3s is a full 32-bit general purpose CPU specifically designed to meet the requirements of embedded systems. The APS family are modern RISC processors with Harvard architecture. They feature leading code density and high power efficiency yet also very high performance.
In addition to these state-of-the-art technical features StarChip and Cortus have signed an agreement allowing StarChip to augment the design of the APS3s to implement embedded security mechanisms. This is the starting point for StarChip to implement its GAIA strategy: A new vision of self healing security architecture on silicon. As a result the StarChip Secure Core will embed all the necessary technology to counter both Side-Channel attacks and Fault Injection attacks making it ideal for applications requiring the highest levels of security.
The ARX CPU development is the key to having unsecured software algorithms running in a fully secure way on a CPU without adding costly software counter-measures.
”We have verified the quality and the efficiency of the Cortus APS3s core from our experience in the SIM controller market,” said Yves Fusella, CTO of StarChip. “Having an agreement between StarChip and Cortus to modify the APS3s was also a key element in our decision of choosing the APS3 as a starting point for the ARX core. It allows the StarChip team to use the best design practices and to implement state-of-the-art and innovative security mechanisms while optimising the overall gate count of the CPU.”
“We are very enthusiastic about this development. StarChip are showing what can be done with our processor IP and tool chain. Not only does the APS3s offer excellent performance, very low power and a tiny footprint; it is also highly configurable and perfectly corresponds to the needs of chip card security systems. This demonstrates the wide range of applications of our processor cores, from these security systems through wireless metering and to powerful multi-core controllers,” added Michael Chapman, President and CEO of Cortus.