EnSilica announces new design centre in India focusing on verification
The new design centre will also provide a scalable resource for projects requiring larger teams to accelerate timescales or deal with complex tasks as well as broaden EnSilicas design capabilities with the addition of new Verilog AMS (analog/mixed-signal) modelling, physical implementation and embedded software services. The new design centre will also further extend EnSilicas existing turnkey ASIC and FPGA design capabilities with additional resources for developing EnSilicas own portfolio of IP including its eSi-RISC highly configurable 16/32 bit embedded processors, eSi-Comms range of communications IP and eSi-Crypto encryption IP.
The Bangalore design centre will be headed by Ranganath Kempanahally as Director of Engineering. Ranganath has 15 years of wide ranging experience in ASIC design and verification roles in India, the USA and the UK. His broad spectrum of experience includes architecting advanced verification environments using eRM, OVM and UVM methodologies. He has a Masters in Electronics from the University of Mangalore, India and an MBA in "Finance and Entrepreneurship" from Cranfield School of Management in the UK.
EnSilica is actively seeking to recruit 30 skilled verification specialists for the new design centre in 2012. Applicants will be required to demonstrate experience in creating effective and pragmatic verification strategies, architecting the test environment and driving the verification process to a successful, on-time and on-budget conclusion.
"The opening of our new design centre in Bangalore, India, initially as a verification centre of excellence, is a strategic step in the ongoing development of our semiconductor services business," said Ian Lankshear, CEO of EnSilica. "The new centre will provide a highly competitive, additional platform for our customers as well as a firm foundation for the development of a range of new and improved capabilities."
For further information about EnSilica, visit www.ensilica.com