EVE’s ZeBu Platform Used by Konica Minolta
Konica Minolta uses ZeBu to accelerate the simulation of its high-speed, high-performance large-scale integrated circuits (LSIs) used in image processing, and to leverage a transaction-based verification methodology using ZEMI-3, EVE’s SCEMI-2.0 compatible behavioral SystemVerilog transactor compiler. During a three-month evaluation, its designers verified a 3.5-million gate design under test (DUT), mapping 280 assertions onto ZeBu, which consumed 0.1-million gates of FPGA resources.
“Using ZeBu-Server, performance was accelerated in the testcase and our designers were impressed with the ease of SVA compilation and the variety of runtime use-models of ZeBu SVA,” remarks Takashi Kawabe, assistant manager of Architecture R&D Division, Device & System Technology R&D Laboratories at Konica Minolta Technology Center, Inc. “Assertion-based verification is one of the key technologies in the functional verification of large designs. However, it also creates concerns regarding simulation performance when it is used in a complex test environment, and includes a practical number of assertions. ZeBu satisfied all of our criteria, using a realistic set of assertions in a complex, transaction-based testcase.”
One ZeBu emulation testcase using a ZeBu ZEMI-3 transaction-level modeling methodology initially running without SVAs completed in 151 seconds. The addition of the SVAs had no impact on the emulation performance, even with 39,620 assertion failures reported by ZeBu –– the resulting execution time was still 151 seconds. Konica Minolta had targeted a 10% performance overhead due to the addition of the SVAs, but there was no such performance decrease using ZeBu.