Goodbye Upconverters?

Thu, 09/22/2011 - 6:40am
A. Glascott-Jones, F. Bore, J.P. Amblard, N. Chantier; e2v Grenoble
Advanced high bandwidth, high data rate Digital to Analog Converters (DACs) are revolutionizing the way that microwave communication systems are designed. The ability to be able to perform direct microwave synthesis right up to C band brings higher flexibility and lower part count without any performance loss with regard to the traditional up converter approach. Are we at a point in time where we can start to say goodbye to the up converter?

Technology advances in high speed digital to analog data converters are allowing significant changes in the way that microwave communications systems are designed.Current modems employ a mixed analog/digital architecture requiring mixers for up conversion. The use of high performance DACs allows the replacement of a large number of these converters by a single DAC.

The ability of the new generation of DACs to convert from a digital signal directly into L, S or even C band (6GHz) can be seen as a large leap in capability allowing greater system flexibility and reduction in power consumption. This is because multiple up-mixers that would normally have been required can now be removed along with the VCO/PLL jitter which adds at every up-conversion.

Currently modems employ a mixed analog/digital architecture requiring mixers for up conversion. The use of high performance DACs allows the replacement of a large number of these converters by a single DAC. 

Figure 1. Aliasing Images at higher frequencies

DAC principle
For up conversion using microwave DACs the effect of aliasing becomes an aid rather than a hindrance. The diagram above shows the aliases of a 100MHz signal when output from a microwave DAC using a sampling frequency of 3GSps.The solid blue curve shows the Sinc X response typical of a DAC using a Non-Return to Zero (NRZ) coding with a zero at the sampling frequency. The signal at 400MHz is readily apparent in the first Nyquist zone but also the alias appears in the second Nyquist zone and images will also appear in the third and fourth zones. Appropriate filtering around the frequencies of interest is all that is needed to isolate the required frequency.

The diagram below shows a more complex spectrum. A 1GHz broadband pattern with a 25MHz notch, which is used to measure the Noise Power Ratio (NPR), centred on 500MHz is shown in a frequency spectrum over 4 Nyquist zones at 3GSps (that is from DC to 6 GHz), here we can see very clearly the effect of the sinc x function. 

Figure 2. Spectrum over 4 Nyquist zones at 3GSps in NRZ output mode.

The NPR values obtained in the 3rd Nyquist zone are typically 41dB.To obtain these high bandwidths the DAC internal design uses advanced current steering techniques and also an ultra high speed process is a must , a SiGeC process with transistor Fts of 200GHz has been used by e2v.

Digital Processing
Using these high performance DACs requires new digital techniques since the data needs to generated and transferred to the DAC at the appropriate speed.

Within the FPGA the technique for outputting the high speed data utilises the SERDES interface. This interface is embedded on most IOs of the higher performance FPGAs. The interface can operate at up to 1.4 Gbps. In this way the internal data can be loaded to the output port in parallel at the lower internal FPGA frequency and output at high speed.

However, to maximize useable bandwidth the data should be output to the DAC at a rate equal to half the sample frequency—which would be 1.5GSps for a 3GSps DAC. FPGA internal clocks would find this difficult so a method known as polyphase generation can be employed. This uses multiple NCOs within the FPGA each with a different phase of the required signal. Each NCO signal is then output in sequence.

The design of the DAC interface can also help in increasing the data rate. MUX techniques can be used where multiple input ports are used to reduce the rate on each port while keeping the overall data rate high. Another important feature is a timing measurement function which assesses the set-up and hold for the input signals and can allow adjustment of the phase of the input signal.

Typical IQ Modulator Performance
Here we see a table comparing the performance of a typical microwave DAC and of a standard wideband IQ Modulator.
e2v Table 1
* Measured using dc bias only. Real value derived from NPR measurement for EV12DS130A = -142dBm/Hz; Modulator value – Not Stated
** 1.5W for Modulator alone – most designs will also include a DAC for baseband signal generation.

We can see that in many aspects the DAC performs better than the fully analog part. Moreover, the function is all located in a small 15X15mm² package.

DAC performance in High Nyquist zones
For good performance in higher Nyquist zones, the clock jitter needs to be carefully considered both internally in the component but also the clock supplied should be of high quality.

The diagram below show a 6 MHz wide QAM128 pattern generated by the EV12DS130A in the first Nyquist zone, at a frequency that would be typically used by cable TV systems and also the image of the same pattern in the 4th Nyquist zone which still shows very good adjacent channel power ratio. 

Figure 3. QAM 128 pattern generated by EV12DS130A in 1st and 4th Nyquist Zones

This kind of performance compares well with that required by systems using GHz carriers, such as LTE and WiMAX. It also matches well with the performance of some broadband IQ modulators designed for these applications.

Advances in DAC technology are changing communications systems architectures.
Their main advantages are:
• Flexibility – different modulation schemes and frequencies can be easily added
• Fast switching between frequencies is possible giving high rate frequency hopping
• The ability to use a single DAC to encode multi-channel system gives savings in PCB real estate.
• Performing the IQ modulation in the FPGA removes the sensitivity to phase and gain shift in the IQ modulator.

Are the days of the up converter numbered?

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