It’s all about system integration for military systems

Mon, 06/13/2011 - 12:03pm
Hector Rivera, Marketing Manager, Mission Critical (communications infrastructure), Texas Instruments
Hector RiveraThe network-centric battlefield approach, in which all systems (platforms) are interconnected nodes to deliver mission critical information to the military personnel, is driving the need for innovative integrated systems. New military systems are relying on system integration to help meet emerging design requirements. The idea is for every vehicle, aircraft, unmanned aerial vehicle (UAV), ship and every soldier to be able to share information including data, voice and video with almost any level of military operation. The importance of getting real-time information to the battlefield is the major focus in today’s military systems which are integral to mission success and the survival of the troops.

These military focused applications require solutions that provide high performance and additional control capabilities for complex ground and air communications while adding minimal amount of weight. One approach to overcome this network-centric hurdle is to design military systems based on multicore digital signal processors (DSPs) or multicore processors. This approach mitigates the challenge of reducing size, weight and power (SWaP) while increasing functionality of the systems. System designers have to take into consideration many factors and performance requirements when designing these systems. The table shown in Figure 1 highlights five of the top criteria used by designers to select processors.

Figure 1: Key selection criteria for processors used in military systems

The commercial off-the-shelf (COTS) multicore or multiprocessor System-on-Chip (SoC) provides designers a choice between a homogeneous, (multiple DSPs in one device) or heterogeneous (an ARM® + DSP in a device) solution for their applications. These two alternatives can provide designers with the right combination of processing performance needed to integrate multiple functions in one system. 

Figure 2: Texas Instruments’ KeyStone multicore SoC architecture

The architecture in Figure 2 highlights how a multicore SoC can be used as a network infrastructure solution. The multicores within the SoC can be used as coprocessors to implement the different layers of the network. Additionally, the SoC has internal shared memory and high speed I/O which provide the memory and inter-processor bandwidth required in systems such as radar, sensor, manpack military and UAVs.

Radar and sensor systems can benefit from the multicore DSP SoC approach. These applications take advantage of the parallel computing capabilities of multicore devices. Aside from radar, signals intelligence and video surveillance, multicore devices have potential uses in application areas including image stabilization, target tracking, flight control, telemetry, and target tracking.

UAV is also an area that can benefit from system integration. For example, a small UAV’s most difficult challenge is reducing SWaP while increasing functionality and autonomy into UAV payload systems. The term small UAV is relative as class 2 and class 3 UAVs encompass UAVs spanning from 21 to 1,320 pounds in take-off weight. UAV systems run multiple applications such as telemetry, flight control, target acquisition, surveillance, armament deployment and communication. Today’s UAVs use a modular payload approach which allows the rapid addition of the capabilities needed for missions. The next generation of UAVs need to have the ability to move from one deployment to the next without the need to change the payload. This requirement calls for adding more functionality into the UAV payload and reducing SWaP.

Today’s UAVs are employing communications and computing subsystems. The next generation of UAVs should incorporate as many subsystems in a common computing architecture or board. The design of the next generation of UAVs can benefit from the system integration available on multicore and multiprocessors devices. The multicore and multiprocessors provide the processing performance and power dissipation necessary to meet the power-constrained systems requirements. These power-limited designs are placing more focus on the GFLOP-per-mW or MIPS-per-mW provided by the multicore and multiprocessors than the raw performance of the device. The COTS multicore or multiprocessors available today are providing the GFLOP-per-mW or MISP-per-mW to address the need for military systems.

The UAV end-users are also demanding greater autonomy. In other words, there is greater demand for increased ability to transmit intelligence from the onboard video, radar, infrared camera, and sensors back to the base. The transmission of intelligence gathered by the UAV to the base is a challenging task. The bandwidth of the link back to the base is limited, which means that most of the processing for sensor, radar, and video capture must be on the UAV. For example, a video system should capture only areas of interest and discard clutter and extraneous images. After video is captured, the information needs to be transmitted using high quality codecs that retain the best possible image quality while minimizing the bandwidth use. The multicore or multiprocessors implementation provides that advantage of a single processing board for multiple sensors and antennas. At the same time it reduces the number of electronic boards in the UAV. The use of these multicore and multiprocessor SoCs for this type of system integration can translate to other unmanned weapons systems. The flexibility provided by multicore or multiprocessor systems enable the same basic hardware platform to be deployed in a wide variety of aircrafts.

In addition to radar and sensor systems and UAVs, manpack military and handheld systems are other systems that can benefit from system integration of multicore or multiprocessors. SWaP is the key concern when it comes to portable manpack military and handheld systems. These systems must be compact and light enough for a soldier to carry on the back. The power dissipation of the system must be low enough to run on batteries between six to twelve hours. A manpack military software defined radio (SDR) is another system that can benefit from multicore integration. One of the implementations of a SDR is that it uses a general propose processor (GPP) with a DSP. A SDR can use a SoC to reduce the size and power of the overall system. Another example is the use of multiple DSPs in a SDR to support multiple and complex waveform used by the military.

The next generations of network-centric systems pose extraordinary challenges to the world of embedded computing. Today’s multicore SoCs and multiprocessors provide designers the capability to meet the processing power, communication bandwidth, SWaP, and wireless communications requirements for the next generation military systems. These capabilities would ensure that all soldiers receive and use information at higher resolution, with greater accuracy and faster access times than ever before allowing them to make quicker, well informed decisions, now and for the foreseeable future.

About the author
Hector Rivera is the mission critical marketing manager for Texas Instruments’ communications infrastructure group. In this role he, is responsible for the growth and support of TI’s mission critical customers, as well as supporting the multicore DSP strategy.

Prior to his role as the marketing manager for mission critical applications, he was an applications manager for TI’s HiRel group. He later transitioned to business development to formulate strategy and road maps for embedded processors applications. In this role, Rivera positioned TI products to support avionics and military applications, including software defined radios, sensors and smart munitions.

Rivera originally joined TI in 2002 as a classification manager of the semiconductor group. As classification manager, he led the effort to enhance TI’s program for the classification of products, software and technology in compliance with the Export Administration Regulations. In this role, he established a process for expedient and comprehensive response concerning product and technology controls to TI operations as well as to regulatory authorities.

Rivera has 21 years of experience in the military and government industries. He received a MSEE from George Mason University and a BSEE from the University of Puerto Rico.



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