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Delivering the Industry’s Best 60A Current Rating

Wed, 04/13/2011 - 5:23am
Carl Smith & Wenkang Huang, International Rectifier
Next generation high performance server, storage and communication system CPU’s, GPU’s and DDR memory have increasingly challenging power management requirements of up to 300A load currents at very low voltages of around 1V. Very high efficiency, low power losses, excellent thermals and reduced space are some of the key demands for next generation systems. In order to meet these requirements, a multiphase synchronous buck converter has to be implemented, as shown in Figure 1. The maximum current per phase has traditionally been limited to 15A to 30A due to the limitations of conventional MOSFET, driver and packaging technologies. Increasing load requirements meant that extra phases were required to handle the power, leading to extra board space, increased system costs and higher component count.

Increasing the maximum current per phase beyond the limits of conventional solutions is a non-trivial exercise and requires several key areas of optimization and innovation, however when realized they can ultimately solve many system-level power design challenges being faced today.

Increased current per phase is mainly achieved by reducing the effective power loss of the solution at a given operating condition, because ultimately the solution has a specific dissipation density capability, and if exceeded, the solution will operate outside of its safe operating area and create a reliability concern. Reducing power loss is a complex task, involving the optimization of many parameters. The MOSFETs themselves need excellent figure-of-merits for the combined on-state resistance (RDS(on)), gate charge (Qg) and gate resistance (Rg) specifications, and need to be tailored specifically for the high side control FET and the low side synchronous FET – each having different switching and conduction characteristics, and contribution to power losses, in a synchronous buck converter. In addition, the driver that is used to switch the gate of the MOSFETs also impacts overall efficiency. The specific gate drive voltage has a direct impact on the level of enhancement of the MOSFET, or RDS(on) of the MOSFET, which when multiplied by the square of the current through the device translates into conduction losses. At the same time, higher switching frequency helps to reduce overall solution size and helps with transient response capability, but if the driver is not optimized, the higher switching frequency can significantly impede the performance of the solution – and switching frequency, gate drive voltage and gate charge parameters also have a direct impact on switching and driver power losses.

Design engineers can spend significant time and resource to figure out the various trade-offs from one MOSFET pair versus another, combined with various drivers, by working through power loss equations with many variable terms to optimize their solution.

Packaging of the silicon also impacts overall performance. Stray parasitic effects within packaging platforms can introduce undesirable electrical and thermal resistances and inductances that degrade performance, and prevent the true performance of the silicon being seen at the system level.

A fully optimized, fully integrated power stage solution that leverages leading edge silicon and packaging technologies can offer many benefits to an end system designer, saving design time and effort while maximizing the performance in the end application.

International Rectifier’s IR3550 PowIRstage integrates a high performance synchronous buck gate driver, IR’s latest generation control and synchronous MOSFETs featuring extremely low on-state resistance (RDS(on)) and gate charge and a Schottky diode into a high density, low profile 6mm x 6mm x 0.9mm PQFN package. The package design is optimized to allow for an ideal motherboard PCB layout and the PowIRstage interconnect technology reduces packaging resistance, thermal resistance and inductance which makes it possible to operate at switching frequencies up to 1.0MHz, while having very efficient thermal performance. The high switching frequency also enables fast transient response, allowing miniaturization of output inductors, as well as input and output capacitors while maintaining high electrical efficiency. 

Figure 1 - A multi-phase buck converter using IR’s High-Density PowIRstage solution.

The integrated high performance gate driver has been optimized to work with the internal MOSFETs to enable the highest efficiency, highest current density power stage solution on the market today, achieving up to 60A in a very small 6mm x 6mm x 0.9mm PQFN package. If inductor loss is not included, the IR3550 PowIRstage peak efficiency reaches 95%, and full load efficiency is about 89% at 60A, as shown in Figure 2. 

Figure 2 – IR3550 PowIRstage Electrical Efficiency

The IR3550 PCB footprint is compatible with other lower current PowIRstage parts in the same family, enabling system level flexibility and scalability for the system designer. The PowIRstage solution is compatible with most industry standard analog or digital controllers and the PWM input accepts 3-level PWM input signals with tri-state operation and is compatible with 3.3V/5V logic signals and is 7V tolerant.

The IR3550 accepts an active low Body-Braking input which disables both MOSFETs to enhance transient performance after load release or provides a high impedance converter output. The IR3550 also provides a phase fault signal capable of detecting open or shorted control or synchronous MOSFETs, or an over-temperature condition in the package.

The IR3550 offers superior performance compared to alternative power stage solutions, by achieving up to a 3.8 percent improvement in electrical efficiency and 43°C cooler device temperatures that reduce heat generation in the system, thereby reducing dependency on complex thermal management techniques and associated costs as well as improving reliability, and reducing the phase count verus current solutions.
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