Digital power management and the PMBus
by Torbjorn Holmberg, Ericsson Power Modules
As systems that incorporate low-voltage logic become ever more complex, the power supplies necessary to correctly operate multiple-voltage chips such as DSPs and FPGAs similarly increase in complexity. For example, it’s now commonplace for an FPGA’s core to operate at 1.2 – 1.8V, while its I/O banks run from multiple levels to interface with external logic families. Most often, chips that have core power supplies that are independent from I/O and auxiliary levels require careful power sequencing to ensure they start up and operate correctly. Typically, these supplies must also be shut down in an order that avoids undesirable and potentially damaging current flow through the chip’s internal structure. Add requirements such as high availability to the system specification and another layer of power-supply monitoring and control becomes necessary. As a result, designers have adopted digital power management schemes to handle all of these requirements, often taking advantage of the increasing trend for digital power converters that embody much of the necessary interface logic within the converter’s core.
Another reason for the rapid uptake of digital power management is its usefulness throughout the system’s life cycle. For instance, during manufacture of the power supply module, ATE control can be used to configure power supply parameters such as output voltage trimming, trip points for overvoltage, overcurrent, and overtemperature conditions, and to load date codes and serial numbers. During the system development process, the digital interfaces to the power converters enable designers to optimize the power system’s performance by connecting a laptop computer with suitable control software. It’s then easy to measure temperature, voltages and output currents, to set the trip points for fault protection circuits, and to optimize the power sequencing. This is much easier and faster than the conventional approach with analog controls that involves installing several iterations of components and hacking into PC board traces to make current measurements. Data collection and logging is also much more streamlined. Then, during production assembly and testing of the board and system, ATE can exploit the digital power management interface to perform voltage margin testing, voltage monitoring and trimming, measure conversion efficiency, and record serial numbers and date codes for traceability and support purposes.
If necessary, the designer can remove the digital interfaces when the development phase is complete. Increasingly however, the system designer retains a host controller on the board for use during normal operation. It’s then possible to implement sophisticated start-up and shut-down sequencing without the complexity of extra components and interconnections. Operating temperatures are easy to monitor for regulating system fan speeds. Importantly for high-availability applications, it’s straightforward to monitor efficiency in real time and detect any degradation before hardware failures occur. Fault detection and management routines can be developed that take into account conditions elsewhere in the system.
Digital Power Management Architecture
Digital power management systems typically assume a basic architecture consisting of power converters that communicate with a central control device via a digital communications bus. The converters can be isolated DC/DC converters or non-isolated point-of-load (POL) converters. The central control device can also take many forms, such as a dedicated power management IC, a microcontroller, or spare gates in an FPGA. The central control element is often called the ‘master’ or ‘host’ while controlled converters are normally referred to as ‘slaves’. For the great majority of systems, the host has a control domain that consists of a single system board. In some large-scale systems, this host will interact with higher level controllers elsewhere in the system, or perhaps even with remote devices via long distance communications networks. Figure 1 shows an example of a single-board power system:
To permit end-users maximum flexibility while reducing implementation costs, the choice of communications bus structure and the protocols that it uses are critical. In common with key power-industry groups POLA (Point-of-Load Alliance) and DOSA (Distributed-power Open Standards Alliance) as well as with many other power supply manufacturers, Ericsson supports the use of PMBus for power-management applications. The PMBus specification is freely distributed and is available for use on a royalty-free basis. The System Management Interface Forum (www. powersig.org) owns the protocol and the latest complete information is available from the PMBus organization at www.pmbus.org.
The PMBus is a broad, generic, flexible interface that can be applied to a wide range of devices. It works well with all kinds of power products including isolated DC/DC converters, non-isolated POL converters, bus converters, AC/DC converters, and even fans. The PMBus is not a product in itself and it is also not a standard for power supplies or DC/DC converters. The bus definition does not extend to establishing form factors, pin-outs, and complete structural details of the interconnection components. Alliances such as POLA and DOSA will define the implementation for many suppliers.
The PMBus addresses the host to controlled device communication architecture and does not include provision for direct device-to-device communication. Consequently, it will not directly support converter-to-converter interaction such as is sometimes used for current sharing or analog voltage tracking implementations. These kinds of capabilities will continue to exist, but they will be implemented by other methods that IC and power supply manufacturers develop independently. The intent with PMBus is to provide a dependable, widely-used, and well-understood digital power control and management interface without limiting innovation of other techniques.
The PMBus protocol is defined in a layered manner, and basically defines the rules for sending blocks of data from node to node in the network. The physical layer defines the fundamental interconnection. In its most basic form, the PMBus is a two-wire serial bus that is based upon the SM Bus—which itself is a derivative of the popular I2C bus originally developed by Philips, but enhanced to provide greater functionality for power control applications. The command language layer defines the commands, data formats, and information handling.
Every PMBus implementation has two main signals or lines—DATA and CLOCK—that connect the host with each controlled device. In addition to these two required signals, there are optional extensions to the PMBus. A CONTROL line can extend from the host to one or more controlled devices to define on and off conditions for controlled devices in a manner similar to the Remote Control and Inhibit signals that commonly appear in existing power converters. Another optional signal is SMBALERT#, which is essentially an interrupt that goes from a controlled device to the host to flag a problem or situation that needs attention from the host.
There is also an option on the controlled devices for WRITE PROTECTION. This is a single connection or pin that prevents the host from overwriting data stored in the controlled device. Figures 2 and 3 summarize these signals, with arrowheads depicting the data flow direction. Configure and control commands flow from the host to the controlled devices, while monitoring information flows from the controlled devices to the host. These information transfers occur via the DATA and CLOCK lines under the host’s control. While PMBus requires a unique 7-bit physical address for each controlled device, it does not specify how these addresses are established. This is because there are several methods for accomplishing the addressing and flexibility is important, allowing different hardware suppliers to use different address assignment methods and yet still be compatible with the PM Bus. The 7-bit addressing allows over one hundred unique addresses, which are more than enough for almost any power system application.
One way of establishing a physical address in a controlled device is to use binary pin programming. Each programming pin can be tied to ground for one logic state or left open for the other. For example, with 5 programming pins, there are 32 possible physical addresses. Five extra pins on many power converters represent a significant penalty in terms of cost and size while still having a fairly limited number of possible addresses. Another approach is to use tri-state output drivers on the pins. This gives three states (high, low, open) on each pin and increases the addressing density somewhat. For example, 3 pins permit 27 possible addresses. There can be power sequencing problems with the tri-state approach, however, as the internal voltage necessary to define the ‘high’ state might not be available until after the converter powers up.
One approach that seems promising to Ericsson is to use a resistor trim technique and only a small number of pins. Multiple states can be defined on a single pin by connecting a constant current source that’s internal to the converter to ground via an external programming resistor. Predefined resistor values would correspond to different voltage levels across the resistor, which in turn would correlate with a digital level. For example, if a 10microA current source is used in conjunction with 25kohm resistor steps, voltage steps of 0.25V will result. Eight of these voltage steps would scale from 0 to 2V. Using only two pins would therefore allow a total of 64 unique physical addresses.
The jury is still out on what will be the most popular addressing techniques. In any event, the preferred solution should be a good balance between the following considerations:
• The number of connection pins should be small to reduce size and cost.
• Enough unique addresses should be available for any practical power system.
• The technique must be robust and stable without any unintended state changes due to noise.
• By cooperating with both DOSA and POLA to establish standard configurations for form factors, pin-outs, and mechanical interfaces for the PMBus connections and programming pins, Ericsson continues to play an instrumental part in bringing cost-effective, sophisticated, yet easy-to-use solutions to market.
Torbjörn Holmberg – Biography
He finalized his Master thesis in Electrical Engineering at Linköpings Institute of Technology in 1988. In the end of 1991 he presented his Licentiate Thesis, “Studies of Switched-Current Circuits With Analog Filter Applications”. He worked for Carlstedt Elektronik AB as a RAM designer for 1,5 year. For almost ten years he was working for Silicon Construction Sweden AB in Linköping mainly as an IC designer, but he was also responsible for the test and production, customer contacts, and also the management of the company. During 2003-2004 he built an RF electronic team within Flextronics Design. Since June 2004 he works as an electrical engineer and project manager at Ericsson Power Modules in Sweden.
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