Serial Buses Free I/O Pins

Mon, 06/25/2007 - 11:14am
Jon Titus

titus2More times than designers might like to admit, they wish for just one more I/O pin on a microcontroller. Three chip-to-chip serial buses can help overcome I/O pin limits. The following information provides a quick overview and points you to sources of more information.


The Serial Peripheral Interface (SPI) provides basic communication between a master and one or more slave devices through synchronous-serial communications. The master initiates all communications with slaves and provides the clock signal that governs the bit rate. The SPI offers no high-level protocol, so communications between a master, say a microcontroller, and a peripheral, such as an ADC or a codec, do not require time for housekeeping tasks. The lack of a protocol means SPI-chip vendors come up with their own bit and byte arrangements. The simplest SPI interface requires three signal lines (clock, master-in slave-out and master-out slave-in) and ground.

SPI communications occur a byte at a time but lack an automatic acknowledgement of the receipt of data by a slave device. Also, communications cannot address a specific SPI chip, so each SPI slave must provide an active-low chip-select (/CS) input pin. The master selects a slave device by driving its individual /CS pin to a logic 0. If you have only one SPI slave, you could hardwire the chip-select pin to ground (and save an I/O pin); although an ADC, for example, might use the leading edge of the /CS signal to start a conversion.

SPI devices can quickly use up I/O pins needed to produce /CS signals. If you have more than three SPI devices, consider using a 3-line to 8-line decoder/demultiplexer to generate a /CS signal for as many as eight SPI devices from three or four I/O pins on the master. You also can use an SPI chip such as the Maxim MAX7317 to add 10 general-purpose I/O pins to a circuit.

An SPI connection (a) requires a chip-select signal for each slave. An I2C bus (b) uses one line for bidirectional communication and one line for a clock. A 1-Wire link communicates asynchronous information to and from slaves over one wire that can provide power, too. All circuits require a common ground.

Serial Bus Goes Square

The Inter IC (I2C) communication link, developed by Philips Semiconductors in the 1980s, requires two bidirectional signal lines, one for a clock and another for data, plus ground. Unlike and SPI link, an I2C connection can include more than one controlling device in a multimaster configuration. Peripheral devices include real-time clocks, memories, LCD drivers and analog converters.

All I2C devices have preset unique addresses, so they require no chip-select lines. Manufacturers of I2C I/O devices may include programming pins that allow several of the same devices to operate on an I2C bus. The Analog Devices AD7991, a 2-channel 12-bit ADC, lets developers use as many as five of these chips on an I2C bus. To start, a committee assigned chip manufacturers unique 7-bit device addresses, which quickly ran out. The I2C specification now accommodates 10-bit addresses and engineers can mix chips with a 7- or a 10-bit address on an I2C bus.

Communications occur at one of three speeds, 100 kbits/sec (standard), 400 kbits/sec (fast), or up to 3.4 Mbits/sec (high speed). A maximum wire capacitance of 400 pF limits the length of I2C communications, although companies offer bus extenders and repeaters. NXP Semiconductor, for example, offers 20 such ICs.

Unlike SPI slaves, the I2C protocol includes an acknowledgment. The wired-AND nature of the signal lines lets a receiving device pull the data line low for one clock period to acknowledge receipt of each byte. The I2C specification does not include error correction, although software can implement that capability.

1-Wire Bus Takes Two

The proprietary 1-Wire technology from Dallas Semiconductor uses one wire for communications and power. (You need a ground wire, too.) Communications involve a master and one or more slave devices, such as sensors, EPROMs, and battery monitors. Asynchronous communications use carefully timed pulse-widths to represent data. A logic-1 condition pulls the data line low for 15 µsec or less and a logic 0 pulls the line low for at least 60 µsec. (Peripherals can pull small amounts of power from the communication line when it is idle.)

Each 1-Wire device comes with a unique 64-bit ID number that supplies an 8-bit device-type identifier, a 48-bit address and an 8-bit CRC value. The 48-bit address ensures no conflict along devices on a 1-Wire line. Software in the master can discover the device types and their serial numbers. Dallas Semiconductor — part of Maxim Integrated Products — produces many 1-Wire devices. But as far as I know, no other manufacturer offers 1-Wire chips.



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