DSP Tools Cut Development Time

Tue, 05/01/2007 - 7:30am
Jon Titus, Senior Technical Editor


Jon Titus

A few years ago, if you needed to perform digital signal-processing tasks, you could use a brute-force method in a microprocessor or use a digital signal-processor (DSP) chip. Designers now have choices that range from microcontrollers with DSP functions to DSP elements that drop into FPGAs. To help engineers get the lay of the land, we talked with vendors at several points across the DSP spectrum. Unfortunately, we cannot cover every company, chip and tool.

Pick a PIC, Get DSP

By combining DSP components, such as accumulators, multipliers and barrel shifters within its popular PIC microcontroller architecture, Microchip Technology lets designers who are familiar with MCUs take advantage of DSP capabilities. "We have three audiences for our tools," said Steve Marsh, strategic marketing manager for the Digital Signal Controller Division at Microchip. "First, traditional analog designers; second, designers familiar with microcontrollers; and third, hard-core DSP engineers."

The analog people often need to implement controllers for power-conversion applications or digital filters. To start, they can use dsPIC Filter Design and dsPICworks. "The dsPICworks tool generates and analyzes data so you can create signals at different frequencies and produce a data file of that information for your application," explained Priyabrata Sinha, principal applications engineer, also in Microchip's Digital Signal Controller Division. "You can import data captured with your debugging tools and then view the data, perform an FFT or manipulate it in other ways."

Figure 1. The PICDEM low-voltage motor-control package from Microchip Technology provides an easy way to test algorithms and adjust control-loop characteristics for your application.
"The dsPIC Filter Design software helps engineers create FIR and IIR filters," said Sinha. "The tool computes the filter coefficients and generates a structure usable by C programs that contain filter coefficients, pointers to data and other information." Developers can then take data created with dsPICworks and run it through their filters to measure performance.

Engineers who design controllers for switch-mode power supplies (SMPSs) can start with Microchip's dsPICDEM SMPS Buck Development Board. The board package includes code that demonstrates how to implement a digital control loop. Microchip also plans to provide SMPS reference designs.

"When a product requires features that will depend on DSP capabilities, engineers can call up a library function without thinking about the signal-processing hardware," said Sinha. "Then they design an application in terms of vocoders [voice coders/decoders] or motor controllers rather than think about how to use multipliers and accumulators." Microchip's compilers include free libraries with adaptive filtering, windowing operations, vector algebra and other functions that include motor control.

Microchip also licenses libraries created by Microchip's engineers or hired experts. Engineers can freely download and evaluate those libraries which include noise-suppression, speech-processing and echo-cancellation functions. When companies use a library in a product, companies pay a one-time fee.

The last of the three groups — the hard-core DSP experts — approaches projects differently. After they develop algorithms, they look for hardware that will properly handle the code. "Some of these experts use MATLAB and Simulink," said Marsh. "So we have a 'plug in' for MATLAB that permits seamless interaction with our MPLAB IDE."

Blackfin Swims Through DSP Code

From the start, Analog Devices designed its Blackfin processor as both a DSP chip and an MCU. "We continue to find applications where a DSP and an MCU come together," said Derek Leadbetter, director of the DSP tools product line at Analog Devices. "Engineers might have enough capability in an MCU to add audio features, but to use audio and video, they would have to add a second chip: a DSP. We already provide DSP functions in the Blackfin family."

For each member of the Blackfin chip family, Analog Devices creates an EZ-KIT Lite that supplies the processor, SDRAM, Flash memory and I/O devices on a PCB. When they evaluate a processor, about 95 percent of customers take the kit route. "We include drivers for every device on the boards and on our daughter cards," said Leadbetter. "So users can quickly 'talk' with all the peripherals." The company also offers an advanced package, the Multi-Media Starter Kit, which builds upon an ADSP-BF561 EZ-KIT Lite and aims to serve video and imaging applications.

Figure 2. The ADSP-BF537 EZ-KIT Lite board provides developers with a Blackfin processor and peripherals that include a 10/100 Ethernet MAC and CAN 2.0B controller. A TCP/IP stack with integrated device driver and example code comes as part of Analog Device's VisualDSP++ (4.0).
Analog Devices has an extensive list of third-party companies that also offer boards, software and consulting services. Phytec and Bluetechnix, for example, produce boards engineers can include in finished products. These boards borrow inspiration from Blackfin EZ-KIT Lite boards, so with minimal changes, both Analog Devices and third-party boards run the same code.

"Making connections with the outside world challenges engineers," said Leadbetter. "So we supply a standard API we call the Systems Services Library and Device Driver Model that makes it easy to design a product that will connect to a PC through a USB port or to an Ethernet network." Typically, developers program with VisualDSP++ (4.5) which compiles, profiles and debugs code. Programmers can "test drive" VisualDSP++ for 90 days.

"We stress easy accessibility to hardware features so that engineers can use a wizard to handle a task such as cache management," he explained. "We take the mystery out of configuring a processor so users can easily and quickly get a system up and running."

Developers also can ease into Blackfin code development by using a tool such as LabVIEW from National Instruments. "You might use LabVIEW to prototype a system," said Leadbetter. "In the past, after you proved that your algorithms work, you would have to use the DSP chip's programming tools to recode them. Now developers have a bridge between prototype and development because LabVIEW integrates tightly with our own tools."

Compose Your DSP Applications

Texas Instruments places its DSP offerings under the eXpressDSP Software and Development Tool umbrella which covers Code Composer Studio development software, algorithms, emulators and application-and-development kits. Code Composer Studio, or CCStudio, consolidates TI's DSP software-development products into a single IDE that supports all of the company's DSP chips, including the latest TMS320C64x+ DSP cores and DaVinci system-on-a-chip devices with DSP and ARM9 CPUs. "In addition to code-development and analysis tools, Code Composer Studio includes DSP/BIOS, a royalty-free real-time multi-tasking kernel," explained Lori Vidra, development tools product marketing manager at TI. Programmers can download a full version of CCStudio that runs for 120 days — long enough for a semester course on DSP.

Engineers can use tutorials and examples within CCStudio to learn about software features and operations. And tools include new parallel-debug capabilities that let developers better examine inter-processor operations and communications. In mid-March, TI announced a new Trace hardware module that helps engineers track down real-time bugs that can prove elusive and difficult to investigate.

Figure 3. Texas Instruments supplies a DaVinci Evaluation Module (DVEMV) that provides a TMS320DM6446 processor. Developers can use the accompanying hardware and software to jump right into a digital video application.
"To help speed a product through development, we established the eXpressDSP algorithm standard so that engineers can take advantage of commercial algorithms," noted Brian Jeff, software marketing manager at TI. "When developers adhere to the standard, they make confident build-vs.-buy decisions because algorithms from TI or third parties will drop right into application code. Engineers who write code for the DaVinci processor family will appreciate the eXpressDSP Digital Media (XDM) standard which ensures that digital-media encoders and decoders are interchangeable and can operate together." Adherence to the standard eliminates resource conflicts or contentions that would cause problems. "Third parties must specify algorithm requirements in a standardized datasheet so customers understand capabilities, memory requirements and so on," he said.

For over a year, TI has offered its own suite of encoders and decoders for video imaging, speech and audio applications. That means developers can easily obtain known-good code that lets them devote time to enhancing their product rather than debugging home-grown algorithms.

Developers do not live by code alone, so TI also provides evaluation modules (EVMs) that cost from under $200 to several thousand dollars, depending on the processor, the complexity of I/O devices and the provided software. "After they purchase a board, engineers can freely evaluate any of the encoders and decoders from our digital-media software library," said Jeff. "Users can realistically test the DSP chip with high performance code for standards such as H.264 — a digital-video compression standard — and Windows Media 9.

FPGAs Minimize HDL Programming

When developers need to move beyond the capabilities of a DSP or MCU chip, they often look to FPGAs. But, many of these developers do not want to become hardware-description-language (HDL) programmers or experts in FPGA design. No wonder: Traditional FPGA deployment can involve many steps that take an algorithm from C instructions to an FPGA-specific bit stream

To simplify DSP-in-FPGA designs, Xilinx offers the AccelDSP Algorithmic Synthesis Tool, a high-level MATLAB-based synthesis package that lets designers create DSP blocks for Xilinx FPGAs. AccelDSP automates floating-point to fixed-point conversion, generates synthesizable VHDL or Verilog, and it creates a test bench for verification.

Figure 4. The design flow for DSP code aimed at a Xilinx FPGA can follow the paths shown above. A mixed-flow path combines DSP operations created in MATLAB and Simulink, and with tools that produce C++ code.
Building blocks of DSP functions can drop into Xilinx's System Generator for DSP which builds upon the Mathworks' Simulink software. System Generator also gives engineers Xilinx blocksets that contain signal-processing and communications functions such as filters, fast-Fourier transforms, encoders, decoders and so on.

"Engineers can use AccelDSP to explore different micro and macro architectures," explained Tom Feist, marketing director for embedded and signal processing solutions at Xilinx. "A macro architecture could encompass something as simple as a divide operation where you could use a CORDIC, a Newton-Raphson, a Goldschmidt or another division technique. After you make this decision, you might explore the possibility of using a pipeline or a resource-shared micro architecture. That way you can trade off implementations requirements and capabilities. We automate the design 'flow' so developers can develop algorithms within MATLAB, use Simulink as a software test bench and then validate their design within a real FPGA," said Feist.

"System Generator comes with about 50 different designs that engineers can use as examples," said Jim Hwang, director of DSP engineering. "They can open these designs, see how they work and take pieces of them for their own application. We have created our tools to help engineers assemble the pieces." Xilinx also provides complete reference designs. "We have a video starter kit that gives an engineer a complete and working design for a video-processing pipeline," he noted.

"Engineers get to concentrate on getting the best performance out of their algorithms and not on how to implement them on an FPGA chip," said Feist. "We aim to separate engineers from FPGA details. They may have to get involved with I/O at the hardware level, but we do not force them to become VHDL or Verilog programmers."

Xilinx provides its tools for 30- to 60-day evaluations. Software comes with an on-line getting-started tutorial and instructor-led modules that let users try something with the tools and then go on to the next module. The company also provides detailed training in two-day courses.

Sidebar: Execute Your Specs


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